Vias are conductive holes on a printed circuit board, used to electrically connect two layers of the circuit together. They serve several purposes, the most prominent of which is to move a trace from one layer to another, for example from top to bottom. This is useful because it allows the designer a great deal more flexibility during layout, and ultimately can help keep traces shorter by allowing more direct routing of signals, particularly with surface-mount designs.
Vias are also used to create structures called ‘via fences’, or ‘picket fences’, which help isolate different parts of the circuit from each other — for example, separating noisy, high-frequency digital or RF signals from lower-frequency, low-noise analog audio signals. In this form they are also placed around the periphery of the board to help reduce the amount of EMI radiated by a board, and to ensure that no traces end up near the edge of the board.
They can be used in a (loose or tight) grid structure — a ‘via bed’ or ‘copper mattress’ — to redundantly connect ground planes together, which reduces ground loops and ensures the shortest, lowest-impedance path to ground for all components. You can see an example of this in the lower-right corner of the photo of the Raspberry Pi Model B, above.
A non-electrical use for vias is as thermal relief. They can be used to transfer heat from one side of a board to another, or from an internal layer to the outside, and for dissipation as well. For a 1.6mm thick PCB, a 1mm diameter via has ~6.3 times the surface area of a 1mm diameter bare patch of copper (though less air flow across it, so a 630% increase is radiative dissipation is unlikely).
The process of laying down vias in fences and beds is sometimes known as ‘stitching’, because the final product resembles sewed fabric — tiny holes at regular intervals on the PCB. This is especially noticeable when the vias are covered in soldermask, as they are in the photo above.
There are a number of methods for stitching vias in Eagle, and some are more involved than others. Here, I’ll show you the method I use. For clarity, I’ll demonstrate using a 2-layer design, but this method will work for buried vias (between internal layers) and blind vias (surface to internal) as well.
1. Pour the Copper.
First, you need to create copper pours on the top and bottom and name them. Both layers have to have the same name in order for this process to work. Naming them identically tells Eagle that they’re both connected to the same electrical node. Let’s call both of them ground, or “GND”, using the NAME tool.
2. Place the proto-via.
Once both layers are named, throw down a single via, anywhere on the copper pour. For stiched vias used for fences and beds, smaller is usually better, size-wise. The minimum via size is usually dictated by the fab house who will be making your PCBs — this information is part of their ‘design rule’ spec. I use OSHPark for fabbing most of my prototype PCBs, and their minimum via size is 13mil. I usually go with a via size a little above the mininum, say 14 or 15 mil. If there’s a possibility that your board may go into production (at a fab other than your prototyping house), you won’t have to resize everything later.
Once you’ve placed the via, use the NAME tool on it, and give this via the same name as your two copper pours. Eagle may ask if you want to connect the via node (N$2 or something) to node GND — say ‘yes’.
3. Perforate to taste.
Now that you’ve got your GND via, you can use the COPY tool to copy it as many times as you like. In this case (below), I’ve laid out a loose picket fence tracking along the curved trace between R1 and C1. When you’re stitching these vias, it’s a good idea to run a Design Rule Check (DRC) periodically to make sure you’re maintaining minimum clearance between the via and surrounding components/traces.
If you’re laying out a mattress grid of vias, it can be tempting to use the GROUP and COPY GROUP commands to duplicate entire rows of the grid at a time. Unfortunately, this doesn’t work well in Eagle. When you copy a group, it gives the new group a new name. “GND” becomes “GND1″, which is a different electrical node. You’ll still have vias on the board, but they won’t be connected to the copper layers (because Eagle thinks they’re a different node). I find it’s generally easier to simply put the vias down one-by-one, which gives you more control over the layout anyway. Alternately, you can rename the cloned vias to “GND” (Eagle will ask you if you want to connect GND1 to GND).
If you find you’ve made a mistake and need to remove a via, use the RIPUP tool (not the DELETE tool) to remove it. Eagle will show you an “X” where the via used to be to indicate a broken connection. Use the RATSNEST tool to clear the “X”.
How close you place the vias next to one another varies. Some board houses charge more based on the number of through-holes (including vias) in a design, while some do not — again, the board house you use for prototypes may not be the one you use for production; place all the vias you think you need to get the job done.
I typically use a spacing of between 0.08″ and 0.2″ (2 – 5mm) — usually 0.1″ — depending on the density of the other components on the board, how much ground current I’m expecting, etc. More current necessitates more vias, as do noisier circuits. Inductive switch-mode power supplies (buck, boost, SEPIC, etc.) in particular tend to make a lot of noise (and move a lot of current through ground), so put them in a cage.
If I’m using the vias to conduct or dissipate heat, I tend to go larger with the hole sizes and the spacing. I also don’t use stopmask on thermal vias, because stopmask traps heat.
4. Stop mask or no stop mask?
By default, Eagle leaves the annular rings (the plated copper circles around the hole) of vias exposed (no stopmask) when it generates the gerber files for the board. You can change this behavior by altering the DRC file. In the board editor, go to “Tools | DRC” and then the “Masks” tab. Under “limit”, set the size to a number larger than the drill size you chose for your vias. When Eagle generates the gerbers now, it will place stop mask over the entire via. Don’t make the “limit” number too large, though, or you may end up covering component through-holes too.
If you want to turn off stopmask for a particular via, use the INFO tool on it and check “STOP” in the info panel. This will expose the entire annular ring, which is useful for thermal stuff, or if the via is doubling as a test point (p.s. don’t use vias as test points).
And that’s about it! Now you know how to make fences, mattresses and heatsinks with vias in Eagle. You can use this method for traces too, instead of polygon pours, just make sure you name the signal of the trace appropriately.
Wikipedia article about via fences.
Anatomy of a plated through hole [PDF]
SHAMELESS PLUG: I am available for hire to do circuit design and layout and other electrical engineering consulting — send me an email if you’re interested. I also do product and event photography.